1. Technical Field
The present application relates to an apparatus, method and program for controlling a networked communications bus for use in a semiconductor chip.
2. Description of the Related Art
Recently, in the fields of built-in computers and general-purpose processors which use an SoC (System on Chip), there is a growing demand for semiconductor chips with enhanced performance. And as the performance of a semiconductor chip has been enhanced these days to meet such a demand, the requested bandwidth of data to be transferred through communications buses on the chip has increased so much that the bandwidth of the communications buses needs to be increased, too. In order to broaden the bandwidth of a communications bus at a low bus operating frequency, a lot of people have paid much attention these days to a Network-on-chip (NoC) which shares a bus line between multiple processors and which can contribute to using given resources more efficiently.
In an NoC, a plurality of initiators and a memory controller may be connected together, for example. Communications between each of those initiators and the memory controller are carried out using a packet. The packet is relayed by an NoC router which is arranged on the NoC.
FIG. 1 illustrates a configuration for a general NoC router 205. This NoC router 205 includes a plurality of input and output ports and buffers are arranged on the input port end. In each of these buffers, two virtual channels (VCs) are provided for each input port.
An input packet is stored in each virtual channel (VC). By reference to the packet's destination information which is stored in the packet's header, the packet in the VC is switched and transferred by a crossbar switch to an appropriate output port. If multiple packets to be output to the same output port are stored in multiple VCs, those packets are selected and sequentially output one after another according to the arbitration rule of an arbiter. The packets that have not been selected and still left in the VCs will be provided arbitration in the next chance of transmission.
U.S. Pat. No. 6,674,720 discloses a technique for providing arbitration for packets. According to U.S. Pat. No. 6,674,720, in the header of each packet, stored is information about the amount of time that has passed since the packet was generated. If multiple packets to be switched and output are present at the same output port, a router provides arbitration by comparing the amounts of time passed in their packet headers to each other, selecting one of the packets that was generated the longest amount of time ago, and allocating that packet to the output port. In this manner, the latency of packets in the router network can be reduced and bus accesses can get done at high speeds.